The invention relates generally to ion beam lithography and more particularly to ion beam lithography systems without stencil masks.
As the dimensions of semiconductor devices are scaled down in order to achieve ever higher levels of integration, optical lithography will no longer be sufficient for the needs of the semiconductor industry, e.g. DRAM and microprocessor manufacture. Alternative “nanolithography” techniques will be required to realize minimum feature sizes of 0.1 μm or less. In addition, the next generation lithography technologies must deliver high production throughput with low cost per wafer. Therefore, efforts have been intensified worldwide in recent years to adapt established techniques such as X-ray lithography, extreme ultraviolet lithography (EUVL), electron-beam (e-beam) lithography, and ion projection lithography (IPL), to the manufacture of 0.1 μm-generation complementary metal-oxide-semiconductor (CMOS) technology. Significant challenges exist today for each of these techniques. In particular, there are issues with complicated mask technology.
Conventional ion projection lithography (IPL) systems, as shown in FIG. 1A, require many stencil masks for semiconductor circuit processing. An ion source with low energy spread is needed to reduce chromatic aberration. A small beam extracted from the source is accelerated and expanded to form a parallel beam before impinging onto a large area stencil mask which contains many small apertures. The aperture pattern is then projected onto a resist layer on a wafer after the beam is reduced in size and made parallel by an Einzel lens system. Different masks with particular patterns must be used for each layer to be formed on the wafer.
In the conventional IPL setup, the stencil mask, shown in FIG. 2A, is extremely thin, e.g. about 3 μm, to minimize beam scattering inside the aperture channels. Since the beam energy is high, about 10 keV, when it arrives at the mask, both sputtering and mask heating will occur, causing unwanted mask distortion and instability.
An alternative IPL system, the plasma-formed IPL system, as shown in FIG. 1B, and described in copending application Ser. No. 09/289,333 filed herewith, which is herein incorporated by reference, eliminates the acceleration stage between the ion source and stencil mask. Instead a much thicker and more stable mask is used as a beam forming electrode, positioned next to the plasma in the ion source. The extracted beam passes through an acceleration and reduction stage onto the resist coated wafer. Because low energy ions, about 30 eV, pass through the mask, as shown in FIG. 2B, heating, scattering, and sputtering are minimized. However, a separate mask is needed for each new feature pattern to be projected onto the wafer.